DTMES 2022 - Presentation

VCO based sensor to digital converter with locally synthesized sampling clock
Mikias Belhu, AAiT, Ethiopia

Abstract - VCO frequency to environmental factors like temperature variations. These would be devastating for VCO based sensor interfaces since it would be interpreted as a change in the measured variable. A differential architecture is usually employed to minimize the offset error due to such variations where two VCOs are employed in such a way that they are driven by opposite polarities of the input voltage. Although the differential architecture is able to reduce offset error in the system, it cannot correct any arising gain error, which is a multiplicative error due to changes in external factors. In this work, we proposed an idea of VCO based SDC design where the sampling clock can be locally synthesized whose frequency is a fraction of the sum of the frequencies of the two VCOs. In such a way, the period of the locally generated clock varies with the frequency drifts of the VCOs which helps to make the digital output, which is the product of the modulated frequency and the sampling period, be less sensitive to these environmental variations. It is observed from simulation results that the use of the locally synthesized clock can make the VCO based SDC less susceptible to VCO frequency drifts, than using a fixed period clock even in the presence of some mismatch.

Mikias Belhu is currently pursuing his PhD at Addis Ababa University. He worked as a lecturer at Addis Ababa Science and Technology University and Hawassa University. His research interests include frequency based sensor interfaces, time based analog to digital converters, all digital phase locked loops and radiation tolerant electronics. Mikias received his MSc degree in Microelectronic engineering from Addis Ababa University in 2011 and his BSc degree in electrical engineering from Arbaminch University in 2008.